System Verilog few examples

Program block Vs Module

Guess the outputs with defined and undefined PGM

class A;

 function void my_t1 ;

   fork

     #300 $display("%0t:Anthing",$time);

   join_none

 endfunction

 task my_t2;

   fork

     #10;

     #20;

   join_any

   disable fork;

 endtask

endclass:A

`ifdef PGM

 program p;

`else 

 module p;

`endif

  A a;

  initial begin

   a=new();

   fork

    a.my_t1;

    a.my_t2;

   join

   $display("@%0t Wifi",$time);

  end

  final

    $display("It's a final countdown at %0t.", $time);

`ifdef PGM

endprogram

`else

endmodule

`endif

Enum Useage query 

Guess the outputs with defined and undefined CAST_YES

class test_enum_constr; 
typedef enum { EVEN=0, ODD=1} e_even_odd; 

typedef enum { HIGH=1, LOW=0} e_hi_lo; 

rand e_even_odd e1, e2;
rand e_hi_lo    e3;

constraint cEnum

{
    `ifdef CAST_YES

       e1 == e_even_odd'(HIGH);

    `else

       e1 == HIGH;

    `endif 
 }

constraint cSachoEnum

{

    e3 dist { HIGH := 30, LOW := 70 };
 }

function new();

   void'(this.randomize());

endfunction : new 

function void post_randomize();

    $display("\n==> %0p", this);

endfunction : post_randomize 

endclass : test_enum_constr

module test;

  test_enum_constr obj1, obj2;

  initial

  begin

    obj1 = new(); 

    obj2 = new();

    `ifdef CAST_YES

      obj1.e1 = e_even_odd'(obj2.e3);

    `else

      obj1.e1 = obj2.e3;
    `endif // CAST_YES

    obj1.post_randomize();

  end

endmodule : test

Dynamic Array of Class

Guess output with GOOD defined and undefined
class aha;
  shortint unsigned a; 
endclass : aha

module test;
  aha Oho[];
  initial

  begin
    Oho = new[4];
    foreach(Oho[ii])
    begin
      `ifdef GOOD
         Oho[ii] = new;
      `endif          
        Oho[ii].a = $urandom_range(30,90);
      $display("==>>> Oho[%0d] is : %p", ii, Oho[ii]);
    end
  end
endmodule : test

Threading query

while(1)
begin
fork
    begin:Thread1
      .....
    end
    begin:Thread2
      .....
     @(my_event);
      disable Thread1;
    end 
 join_any
end//end_while(1)  

Here assume that after 100ns Thread1 is finished what will happen? Will simulator kill the Thread2 as there is a join_any and will start again with both the threads? Or it will generate new one?